View ISL88041IBZ-T_704841.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
ISL88041
Data Sheet March 9, 2006 FN9229.1
Quad Voltage Monitor
The ISL88041 is a quad voltage-monitoring supervisor designed to monitor voltages 0.7V. Low voltage detection circuitry protects the user 's system from low voltage conditions, resetting the system when any of the monitored power supply voltages V1MON-V4MON fall below their respective minimum voltage thresholds. The reset signal remains asserted until all of these voltages return to proper operating levels and stabilize. Each rail's VMON point is independently adjustable by using an external resistor divider. The VMON inputs will ignore transients of less than 30s on the monitored supplies, and the RST output is guaranteed to be valid down to VDD = 1V. The RST output is open-drain to allow ORing of multiple signals and interfacing to a wide range of logic levels. Also, the MR input allows the user to assert reset when this input is pulled low.
Features
* Quad Voltage Monitoring * Adjustable Voltage Inputs Monitor Voltages 0.7V * Active-Low RST Output * Manual Reset Capability * Reset Signal Valid Down to VDD = 1V * Integrated 20k Pull-Up Resistor on RST * Glitch Immunity on Voltage Monitoring Inputs * 8 Ld SOIC Pb-Free Plus Anneal Package (RoHS Compliant)
Applications
* Graphics Cards * Multi Voltage DSPs & Processors * P Voltage Monitoring
Pinout
ISL88041 (8 LD SOIC) TOP VIEW
VDD RST MR GND 1 2 3 4
* Embedded Control Systems * Intelligent Instruments * Medical Equipment
8 7 6 5
V1MON V2MON V3MON V4MON
* Network Routers * Portable Battery-Powered Equipment * Set-Top Boxes * Telecommunications Systems
Ordering Information
PART NUMBER (Note) ISL88041IBZ PART MARKING 88041IBZ TEMP. RANGE (C) PACKAGE (Pb-Free) PKG. DWG. # M8.15
-40 to +85 8 Ld SOIC (Pb-free)
ISL88041IBZ-T 88041IBZ
-40 to +85 8 Ld SOIC (Tape M8.15 and Reel)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL88041 Pin Descriptions
ISL88041 1 2 3 4 5 6 7 8 PIN NAME VDD RST MR GND V1MON V2MON V3MON V4MON Bias IC from nominal 2.7V to 4V. Active-Low Open Drain Reset Output. Internal 20k pull-up resistor to VDD. Active Low Open Drain MR Input has a 10A Pull-Up to VDD. Ground. Adjustable First Undervoltage Monitor Input Adjustable Second Undervoltage Monitor Input Adjustable Third Undervoltage Monitor Input Adjustable Forth Undervoltage Monitor Input FUNCTION DESCRIPTION
Functional Block Diagram
VDD MR POR PB
V1MON
30s FILTER VREF
RST
V2MON
30s FILTER VREF VREF
30s FILTER
V4MON
30s FILTER GND VREF
V3MON
VREF = 635mV
2
FN9229.1 March 9, 2006
ISL88041
Absolute Maximum Ratings
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V VMON, RST, MR . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4kV (HBM)
Thermal Information
Thermal Resistance (Typical, Note 1)
JA (C/W)
Operating Conditions
VDD Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . +2.7V to +4V Temperature Range (TA) . . . . . . . . . . . . . . . . . . . . . . .-40C to 85C
8 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150C Maximum Storage Temperature Range . . . . . . . . . . . -65C to 150C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. JA is measured in free air with the component mounted on a high effective thermal conductivity test board. See Tech Brief TB379 for details. 2. All voltages are relative to GND, unless otherwise specified.
Electrical Specifications
SYMBOL BIAS VDD IDD VDD_LO VDD_LOR VMON VREF VREFHYST VREF_RNG tFIL RESET IPD RPU VOL tRPD MANUAL RESET VMR VMRHYST IPU tMD tMR
VDD = 3.3V, TA = TJ = -40C - 85C, Unless Otherwise Specified PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Supply Voltage Range VDD Supply Current VDD Lock Out VDD Lock Out Reset VMON > VREF VDD low to high VDD high to low
2.7 165 2.6 2.4
4.0 1000
V A V V
Adj. Reset Threshold Voltage Hysteresis of VREF Range Glitch Filter Duration VREF (max) - VREF (min) VMON glitch to RST low Filter
619
635 10 1.8 30
651
mV mV mV s
Pull-Down Current Internal Pull-up Resistance Output Low VTH to Reset Asserted Delay
RST = 0.5V
2 20
mA k 0.1 V s
VDD = 1V Last valid input = VTH to RST release
0.05 1.5
MR Input Voltage Hysteresis of VMR Pull-up Current MR to Deassert Reset Out Delay MR to Assert Reset Out Delay
MR low to high threshold
0.4VDD
0.5VDD 0.065
0.6VDD
V V A ns ns
MR = 0.5V MR high to RST release MR low to RST pulling low
10 50 15
3
FN9229.1 March 9, 2006
ISL88041 ISL88041 Description and Operation
The ISL88041 is a four voltage detection IC designed to monitor multiple voltages 0.7V. This IC is suitable for microprocessors or industrial system applications providing both reset and manual reset functions. undervoltage threshold (VTRIP) by connecting individual VMON pins to an external resistor divider according to the following formula: VTRIP = 0.635V(R1+R2)/R2 See Figure 8 for a typical application configuration.
VDD Lock Out
Applying power to the ISL88041 VDD activates a lock out circuit which disables the reporting function until VDD rises to ~2.6V. As VDD bias is applied the RST output is held low before VDD = 1V. If VDD falls below ~2.4V the lock out of monitoring and reporting functions is invoked.
Manual Reset
The manual-reset input (MR) allows the user to trigger a reset by using a push-button switch or by signaling the input low. Reset is asserted and deasserted immediately upon MR transitioning through MRVTH, see Figures 6 and 7. Figure 1 is the operational timing diagram.
Low Voltage Monitoring
Once biased to 2.7V the IC continuously monitors and reports from one to four voltages independently through external resistor dividers comparing each VMON pin voltage to a nominal internal 0.635V reference. Once all VMON input voltages rise above this threshold, the RST output is immediately deasserted by being released to be pulled high via its internal 20k (or optional external) pull resistor to VDD indicating that all the minimum voltage conditions have been met (see Figure 4). The RST output is open-drain to allow ORing of signals and interfacing to a range of logic levels. Once any VMON input falls below its respective user-set threshold, the RST output is pulled low after the glitch filter delay (tFIL) as the VMON inputs are designed to reject short undervoltage transients of approximately 30s (see Figure 5). The user can customize the individual rail
Using the ISL88041EVAL1
The ISL88041EVAL1 is the evaluation platform for this product and illustrates the flexibility and simplicity of monitoring four seperate voltages. The RST output can be monitored once the VDD, GND, and appropriate 3.3V, 2.5V, 1.8V and 1.2V supply voltage inputs are properly biased as labeled. A Manual Reset (MR) input is also available for evaluation. The circuit as shown in Figures 10 and 11 has resistor dividers chosen to monitor for an undervoltage threshold level of 89% of the 4 nominal voltages. Figure 1 illustrates the expected behavior and Figures 4 through 7 illustrate the actual IC performance in the ISL88041EVAL1.
VTH VMON 1V MR tRPD >tFIL tMD
RST
FIGURE 1. ISL88041 OPERATIONAL TIMING DIAGRAM
4
FN9229.1 March 9, 2006
ISL88041 Typical Performance Curves
0.6 0.5 VDD BIAS CURRENT (mA) VMON < VMON_L2H VMON THRESHOLD (V) VMON > VMON_L2H 0.645 0.642 0.639 0.636 0.633 0.630 0.627 2.6 3.0 3.33 3.66 4.0 VDD BIAS VOLTAGE (V)
0.4 0.3 0.2 0.1 0
2.6
3.3
3.5
3.7
3.9
VDD BIAS VOLTAGE (V)
Figure 2 illustrates the idle and active bias currents levels. FIGURE 2. VDD CURRENT vs VDD VOLTAGE
Figure 3 shows the VMON threshold shift over the bias range, demonstrating a PSRR of 105dB. FIGURE 3. VMON THRESHOLD vs VDD VOLTAGE
VMON
VMON
RST
tFIL ~30s
RST
RST = 2V/DIV VMON = 1V/DIV
1s/DIV
RST = 2V/DIV VMON = 1V/DIV
10s/DIV
FIGURE 4. VMON HIGH TO RST HIGH
FIGURE 5. VMON LOW TO RST LOW
RST
RST
MR
MR
RST = 1V/DIV MR = 1V/DIV
1s/DIV
MR = 1V/DIV RST = 1V/DIV
10ns/DIV
FIGURE 6. MR HIGH TO RST HIGH
FIGURE 7. MR LOW TO RST LOW
5
FN9229.1 March 9, 2006
ISL88041 Typical Performance Curves
(Continued)
V4 IN
V3 IN
V2 IN
V1 IN
PS1 PS2 HIGH VALUE CIRCUIT REQUIRING ACCURATE VOLTAGE MONITORING
ISL88041 1 2 3 4 VDD RST MR GND VMON1 8 VMON2 7
*OPT
PS3
PS4 VMON3 6 VMON4 5 VMON 1- 4
ISL88041
MR RST
FIGURE 8. ISL88041 TYPICAL APPLICATION SCHEMATIC
FIGURE 9. TYPICAL ISL88041 APPLICATION DIAGRAM
V_1.2
V_1.8
V_2.5
ISL88041 1 2 0.1F 3 4 VDD RST MR GND VMON1 8 VMON2 7 VMON3 6 VMON4 5 10k 10k 10k 6.98k 15.4k 24.9k
V_3.3 36.5k 10k
FIGURE 10. ISL88041EVAL1 SCHEMATIC
FIGURE 11. ISL88041EVAL1 PHOTO
6
FN9229.1 March 9, 2006
ISL88041 Small Outline Plastic Packages (SOIC)
N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45 0.25(0.010) M BM
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INCHES SYMBOL A
L
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 4.00 NOTES 9 3 4 5 6 7 8 Rev. 1 6/05
MIN 0.0532 0.0040 0.013 0.0075 0.1890 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.1574
A1 B C D E
A1 0.10(0.004) C
e H h L N
0.050 BSC 0.2284 0.0099 0.016 8 0 8 0.2440 0.0196 0.050
1.27 BSC 5.80 0.25 0.40 8 0 6.20 0.50 1.27
e
B 0.25(0.010) M C AM BS
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 7
FN9229.1 March 9, 2006

▲Up To Search▲

Price & Availability of ISL88041IBZ-T

	To Download ISL88041IBZ-T Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .